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<div class="header">
  <div class="headertitle"><div class="title">FLASH Interrupt definition <div class="ingroups"><a class="el" href="group___s_t_m32_h7xx___h_a_l___driver.html">STM32H7xx_HAL_Driver</a> &raquo; <a class="el" href="group___f_l_a_s_h.html">FLASH</a> &raquo; <a class="el" href="group___f_l_a_s_h___exported___constants.html">FLASH Exported Constants</a></div></div></div>
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<p>FLASH Interrupt definition.  
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<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-define-members" class="groupheader"><a id="define-members" name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga1ec1ef5c1c76161b7dfe81e180e4b3bc" id="r_ga1ec1ef5c1c76161b7dfe81e180e4b3bc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga1ec1ef5c1c76161b7dfe81e180e4b3bc">FLASH_IT_EOP_BANK1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab9e69856f654ec430a42791a34799db0">FLASH_CR_EOPIE</a></td></tr>
<tr class="memitem:ga0982dd9273150c589c64384f98680f8c" id="r_ga0982dd9273150c589c64384f98680f8c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga0982dd9273150c589c64384f98680f8c">FLASH_IT_WRPERR_BANK1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga3fb16250168b407d58021199f2e55dd6">FLASH_CR_WRPERRIE</a></td></tr>
<tr class="memitem:ga75f2443e9186b6010c22df22a7d0a795" id="r_ga75f2443e9186b6010c22df22a7d0a795"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga75f2443e9186b6010c22df22a7d0a795">FLASH_IT_PGSERR_BANK1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae8deb645d3931dba28cf1ce31c25b3b2">FLASH_CR_PGSERRIE</a></td></tr>
<tr class="memitem:ga24700978c9b5fcf608a28a55bb0bfb82" id="r_ga24700978c9b5fcf608a28a55bb0bfb82"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga24700978c9b5fcf608a28a55bb0bfb82">FLASH_IT_STRBERR_BANK1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga668cc207455dd7b5180de23c70876de2">FLASH_CR_STRBERRIE</a></td></tr>
<tr class="memitem:ga94ed32b4323dad1fbdabf08514da5473" id="r_ga94ed32b4323dad1fbdabf08514da5473"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga94ed32b4323dad1fbdabf08514da5473">FLASH_IT_INCERR_BANK1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae220b6ecd74fb7cbd19e072b3a00085e">FLASH_CR_INCERRIE</a></td></tr>
<tr class="memitem:ga63d27c2a86d8baeb592764e034214796" id="r_ga63d27c2a86d8baeb592764e034214796"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga63d27c2a86d8baeb592764e034214796">FLASH_IT_RDPERR_BANK1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaac4593fa3b719667158986af4d44846b">FLASH_CR_RDPERRIE</a></td></tr>
<tr class="memitem:ga13eaaa8999f0beeb6ba8bf85904b28fb" id="r_ga13eaaa8999f0beeb6ba8bf85904b28fb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga13eaaa8999f0beeb6ba8bf85904b28fb">FLASH_IT_RDSERR_BANK1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga9ee5c20523359c7a1cf348ba71867502">FLASH_CR_RDSERRIE</a></td></tr>
<tr class="memitem:ga28519e989fe0b990de8ed886beac03d1" id="r_ga28519e989fe0b990de8ed886beac03d1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga28519e989fe0b990de8ed886beac03d1">FLASH_IT_SNECCERR_BANK1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga3ded89effc76714dc0fecd93a8877dcb">FLASH_CR_SNECCERRIE</a></td></tr>
<tr class="memitem:gaabb332bc14eb56d71f8407f68f804510" id="r_gaabb332bc14eb56d71f8407f68f804510"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#gaabb332bc14eb56d71f8407f68f804510">FLASH_IT_DBECCERR_BANK1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaaeeb7a4dc65c20e72f61bcb221a78f42">FLASH_CR_DBECCERRIE</a></td></tr>
<tr class="memitem:ga196e6f4de2ebe393b60c266915a3bb7e" id="r_ga196e6f4de2ebe393b60c266915a3bb7e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga196e6f4de2ebe393b60c266915a3bb7e">FLASH_IT_CRCEND_BANK1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaa6202de9f4d37382c3a52afe3c2cd655">FLASH_CR_CRCENDIE</a></td></tr>
<tr class="memitem:ga82dc3ee19141b5c071d2fa8db946ebe3" id="r_ga82dc3ee19141b5c071d2fa8db946ebe3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga82dc3ee19141b5c071d2fa8db946ebe3">FLASH_IT_CRCRDERR_BANK1</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad8bf514ceab184ed0c0a1d661815ba5a">FLASH_CR_CRCRDERRIE</a></td></tr>
<tr class="memitem:ga08cb91e82083fec8239ba581f4437feb" id="r_ga08cb91e82083fec8239ba581f4437feb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga08cb91e82083fec8239ba581f4437feb">FLASH_IT_ALL_BANK1</a></td></tr>
<tr class="memitem:ga8345669c6dc0421104392dd926f1d47f" id="r_ga8345669c6dc0421104392dd926f1d47f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga8345669c6dc0421104392dd926f1d47f">FLASH_IT_EOP_BANK2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gab9e69856f654ec430a42791a34799db0">FLASH_CR_EOPIE</a>      | 0x80000000U)</td></tr>
<tr class="memitem:ga0e1cdf3a8de710205f1089662e8ec60e" id="r_ga0e1cdf3a8de710205f1089662e8ec60e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga0e1cdf3a8de710205f1089662e8ec60e">FLASH_IT_WRPERR_BANK2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga3fb16250168b407d58021199f2e55dd6">FLASH_CR_WRPERRIE</a>   | 0x80000000U)</td></tr>
<tr class="memitem:gaee38b44a624d8b1f3b376a29add7eabb" id="r_gaee38b44a624d8b1f3b376a29add7eabb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#gaee38b44a624d8b1f3b376a29add7eabb">FLASH_IT_PGSERR_BANK2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gae8deb645d3931dba28cf1ce31c25b3b2">FLASH_CR_PGSERRIE</a>   | 0x80000000U)</td></tr>
<tr class="memitem:gac2bb0fa7590ba98dc0cd8c0d082ce8ab" id="r_gac2bb0fa7590ba98dc0cd8c0d082ce8ab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#gac2bb0fa7590ba98dc0cd8c0d082ce8ab">FLASH_IT_STRBERR_BANK2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga668cc207455dd7b5180de23c70876de2">FLASH_CR_STRBERRIE</a>  | 0x80000000U)</td></tr>
<tr class="memitem:ga5ffef1590d3e34618ead8ad0c73609ad" id="r_ga5ffef1590d3e34618ead8ad0c73609ad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga5ffef1590d3e34618ead8ad0c73609ad">FLASH_IT_INCERR_BANK2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gae220b6ecd74fb7cbd19e072b3a00085e">FLASH_CR_INCERRIE</a>   | 0x80000000U)</td></tr>
<tr class="memitem:gaa9938793bc0431bdbba273f38123372e" id="r_gaa9938793bc0431bdbba273f38123372e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#gaa9938793bc0431bdbba273f38123372e">FLASH_IT_RDPERR_BANK2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gaac4593fa3b719667158986af4d44846b">FLASH_CR_RDPERRIE</a>   | 0x80000000U)</td></tr>
<tr class="memitem:ga0613c2c2451c9b07a91b661ee2c03648" id="r_ga0613c2c2451c9b07a91b661ee2c03648"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga0613c2c2451c9b07a91b661ee2c03648">FLASH_IT_RDSERR_BANK2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga9ee5c20523359c7a1cf348ba71867502">FLASH_CR_RDSERRIE</a>   | 0x80000000U)</td></tr>
<tr class="memitem:ga41a3c918d208bbcdaae67abf0ebe9900" id="r_ga41a3c918d208bbcdaae67abf0ebe9900"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga41a3c918d208bbcdaae67abf0ebe9900">FLASH_IT_SNECCERR_BANK2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga3ded89effc76714dc0fecd93a8877dcb">FLASH_CR_SNECCERRIE</a> | 0x80000000U)</td></tr>
<tr class="memitem:ga8d4c4f393d3dcaf9e4bc547fe8163f8e" id="r_ga8d4c4f393d3dcaf9e4bc547fe8163f8e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga8d4c4f393d3dcaf9e4bc547fe8163f8e">FLASH_IT_DBECCERR_BANK2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gaaeeb7a4dc65c20e72f61bcb221a78f42">FLASH_CR_DBECCERRIE</a> | 0x80000000U)</td></tr>
<tr class="memitem:ga0316e91aff7629580bed1a5cc9c11e75" id="r_ga0316e91aff7629580bed1a5cc9c11e75"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga0316e91aff7629580bed1a5cc9c11e75">FLASH_IT_CRCEND_BANK2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gaa6202de9f4d37382c3a52afe3c2cd655">FLASH_CR_CRCENDIE</a>   | 0x80000000U)</td></tr>
<tr class="memitem:ga81f4bdb6e41b6f99d9de03ca0b37b898" id="r_ga81f4bdb6e41b6f99d9de03ca0b37b898"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga81f4bdb6e41b6f99d9de03ca0b37b898">FLASH_IT_CRCRDERR_BANK2</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gad8bf514ceab184ed0c0a1d661815ba5a">FLASH_CR_CRCRDERRIE</a> | 0x80000000U)</td></tr>
<tr class="memitem:ga3140138329c41338bcd139d5fb6d019f" id="r_ga3140138329c41338bcd139d5fb6d019f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga3140138329c41338bcd139d5fb6d019f">FLASH_IT_ALL_BANK2</a></td></tr>
</table>
<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
<p>FLASH Interrupt definition. </p>
<a name="doc-define-members" id="doc-define-members"></a><h2 id="header-doc-define-members" class="groupheader">Macro Definition Documentation</h2>
<a id="ga08cb91e82083fec8239ba581f4437feb" name="ga08cb91e82083fec8239ba581f4437feb"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga08cb91e82083fec8239ba581f4437feb">&#9670;&#160;</a></span>FLASH_IT_ALL_BANK1</h2>

<div class="memitem">
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          <td class="memname">#define FLASH_IT_ALL_BANK1</td>
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</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">                                            (<a class="code hl_define" href="#ga1ec1ef5c1c76161b7dfe81e180e4b3bc">FLASH_IT_EOP_BANK1</a>       | <a class="code hl_define" href="#ga0982dd9273150c589c64384f98680f8c">FLASH_IT_WRPERR_BANK1</a>    | \</div>
<div class="line">                                            <a class="code hl_define" href="#ga75f2443e9186b6010c22df22a7d0a795">FLASH_IT_PGSERR_BANK1</a>    | <a class="code hl_define" href="#ga24700978c9b5fcf608a28a55bb0bfb82">FLASH_IT_STRBERR_BANK1</a>   | \</div>
<div class="line">                                            <a class="code hl_define" href="#ga94ed32b4323dad1fbdabf08514da5473">FLASH_IT_INCERR_BANK1</a>    | <a class="code hl_define" href="#ga63d27c2a86d8baeb592764e034214796">FLASH_IT_RDPERR_BANK1</a>    | \</div>
<div class="line">                                            <a class="code hl_define" href="#ga13eaaa8999f0beeb6ba8bf85904b28fb">FLASH_IT_RDSERR_BANK1</a>    | <a class="code hl_define" href="#ga28519e989fe0b990de8ed886beac03d1">FLASH_IT_SNECCERR_BANK1</a>  | \</div>
<div class="line">                                            <a class="code hl_define" href="#gaabb332bc14eb56d71f8407f68f804510">FLASH_IT_DBECCERR_BANK1</a>  | <a class="code hl_define" href="#ga196e6f4de2ebe393b60c266915a3bb7e">FLASH_IT_CRCEND_BANK1</a>    | \</div>
<div class="line">                                            <a class="code hl_define" href="#ga82dc3ee19141b5c071d2fa8db946ebe3">FLASH_IT_CRCRDERR_BANK1</a>)</div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga0982dd9273150c589c64384f98680f8c"><div class="ttname"><a href="#ga0982dd9273150c589c64384f98680f8c">FLASH_IT_WRPERR_BANK1</a></div><div class="ttdeci">#define FLASH_IT_WRPERR_BANK1</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:256</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga13eaaa8999f0beeb6ba8bf85904b28fb"><div class="ttname"><a href="#ga13eaaa8999f0beeb6ba8bf85904b28fb">FLASH_IT_RDSERR_BANK1</a></div><div class="ttdeci">#define FLASH_IT_RDSERR_BANK1</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:264</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga196e6f4de2ebe393b60c266915a3bb7e"><div class="ttname"><a href="#ga196e6f4de2ebe393b60c266915a3bb7e">FLASH_IT_CRCEND_BANK1</a></div><div class="ttdeci">#define FLASH_IT_CRCEND_BANK1</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:267</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga1ec1ef5c1c76161b7dfe81e180e4b3bc"><div class="ttname"><a href="#ga1ec1ef5c1c76161b7dfe81e180e4b3bc">FLASH_IT_EOP_BANK1</a></div><div class="ttdeci">#define FLASH_IT_EOP_BANK1</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:255</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga24700978c9b5fcf608a28a55bb0bfb82"><div class="ttname"><a href="#ga24700978c9b5fcf608a28a55bb0bfb82">FLASH_IT_STRBERR_BANK1</a></div><div class="ttdeci">#define FLASH_IT_STRBERR_BANK1</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:258</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga28519e989fe0b990de8ed886beac03d1"><div class="ttname"><a href="#ga28519e989fe0b990de8ed886beac03d1">FLASH_IT_SNECCERR_BANK1</a></div><div class="ttdeci">#define FLASH_IT_SNECCERR_BANK1</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:265</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga63d27c2a86d8baeb592764e034214796"><div class="ttname"><a href="#ga63d27c2a86d8baeb592764e034214796">FLASH_IT_RDPERR_BANK1</a></div><div class="ttdeci">#define FLASH_IT_RDPERR_BANK1</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:263</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga75f2443e9186b6010c22df22a7d0a795"><div class="ttname"><a href="#ga75f2443e9186b6010c22df22a7d0a795">FLASH_IT_PGSERR_BANK1</a></div><div class="ttdeci">#define FLASH_IT_PGSERR_BANK1</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:257</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga82dc3ee19141b5c071d2fa8db946ebe3"><div class="ttname"><a href="#ga82dc3ee19141b5c071d2fa8db946ebe3">FLASH_IT_CRCRDERR_BANK1</a></div><div class="ttdeci">#define FLASH_IT_CRCRDERR_BANK1</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:268</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga94ed32b4323dad1fbdabf08514da5473"><div class="ttname"><a href="#ga94ed32b4323dad1fbdabf08514da5473">FLASH_IT_INCERR_BANK1</a></div><div class="ttdeci">#define FLASH_IT_INCERR_BANK1</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:259</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_gaabb332bc14eb56d71f8407f68f804510"><div class="ttname"><a href="#gaabb332bc14eb56d71f8407f68f804510">FLASH_IT_DBECCERR_BANK1</a></div><div class="ttdeci">#define FLASH_IT_DBECCERR_BANK1</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:266</div></div>
</div><!-- fragment --><p>All Bank 1 Interrupt sources </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga3140138329c41338bcd139d5fb6d019f">&#9670;&#160;</a></span>FLASH_IT_ALL_BANK2</h2>

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          <td class="memname">#define FLASH_IT_ALL_BANK2</td>
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<b>Value:</b><div class="fragment"><div class="line">                                            (<a class="code hl_define" href="#ga8345669c6dc0421104392dd926f1d47f">FLASH_IT_EOP_BANK2</a>       | <a class="code hl_define" href="#ga0e1cdf3a8de710205f1089662e8ec60e">FLASH_IT_WRPERR_BANK2</a>    | \</div>
<div class="line">                                            <a class="code hl_define" href="#gaee38b44a624d8b1f3b376a29add7eabb">FLASH_IT_PGSERR_BANK2</a>    | <a class="code hl_define" href="#gac2bb0fa7590ba98dc0cd8c0d082ce8ab">FLASH_IT_STRBERR_BANK2</a>   | \</div>
<div class="line">                                            <a class="code hl_define" href="#ga5ffef1590d3e34618ead8ad0c73609ad">FLASH_IT_INCERR_BANK2</a>    | <a class="code hl_define" href="#gaa9938793bc0431bdbba273f38123372e">FLASH_IT_RDPERR_BANK2</a>    | \</div>
<div class="line">                                            <a class="code hl_define" href="#ga0613c2c2451c9b07a91b661ee2c03648">FLASH_IT_RDSERR_BANK2</a>    | <a class="code hl_define" href="#ga41a3c918d208bbcdaae67abf0ebe9900">FLASH_IT_SNECCERR_BANK2</a>  | \</div>
<div class="line">                                            <a class="code hl_define" href="#ga8d4c4f393d3dcaf9e4bc547fe8163f8e">FLASH_IT_DBECCERR_BANK2</a>  | <a class="code hl_define" href="#ga0316e91aff7629580bed1a5cc9c11e75">FLASH_IT_CRCEND_BANK2</a>    | \</div>
<div class="line">                                            <a class="code hl_define" href="#ga81f4bdb6e41b6f99d9de03ca0b37b898">FLASH_IT_CRCRDERR_BANK2</a>)</div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga0316e91aff7629580bed1a5cc9c11e75"><div class="ttname"><a href="#ga0316e91aff7629580bed1a5cc9c11e75">FLASH_IT_CRCEND_BANK2</a></div><div class="ttdeci">#define FLASH_IT_CRCEND_BANK2</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:298</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga0613c2c2451c9b07a91b661ee2c03648"><div class="ttname"><a href="#ga0613c2c2451c9b07a91b661ee2c03648">FLASH_IT_RDSERR_BANK2</a></div><div class="ttdeci">#define FLASH_IT_RDSERR_BANK2</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:295</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga0e1cdf3a8de710205f1089662e8ec60e"><div class="ttname"><a href="#ga0e1cdf3a8de710205f1089662e8ec60e">FLASH_IT_WRPERR_BANK2</a></div><div class="ttdeci">#define FLASH_IT_WRPERR_BANK2</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:287</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga41a3c918d208bbcdaae67abf0ebe9900"><div class="ttname"><a href="#ga41a3c918d208bbcdaae67abf0ebe9900">FLASH_IT_SNECCERR_BANK2</a></div><div class="ttdeci">#define FLASH_IT_SNECCERR_BANK2</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:296</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga5ffef1590d3e34618ead8ad0c73609ad"><div class="ttname"><a href="#ga5ffef1590d3e34618ead8ad0c73609ad">FLASH_IT_INCERR_BANK2</a></div><div class="ttdeci">#define FLASH_IT_INCERR_BANK2</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:290</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga81f4bdb6e41b6f99d9de03ca0b37b898"><div class="ttname"><a href="#ga81f4bdb6e41b6f99d9de03ca0b37b898">FLASH_IT_CRCRDERR_BANK2</a></div><div class="ttdeci">#define FLASH_IT_CRCRDERR_BANK2</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:299</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga8345669c6dc0421104392dd926f1d47f"><div class="ttname"><a href="#ga8345669c6dc0421104392dd926f1d47f">FLASH_IT_EOP_BANK2</a></div><div class="ttdeci">#define FLASH_IT_EOP_BANK2</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:286</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_ga8d4c4f393d3dcaf9e4bc547fe8163f8e"><div class="ttname"><a href="#ga8d4c4f393d3dcaf9e4bc547fe8163f8e">FLASH_IT_DBECCERR_BANK2</a></div><div class="ttdeci">#define FLASH_IT_DBECCERR_BANK2</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:297</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_gaa9938793bc0431bdbba273f38123372e"><div class="ttname"><a href="#gaa9938793bc0431bdbba273f38123372e">FLASH_IT_RDPERR_BANK2</a></div><div class="ttdeci">#define FLASH_IT_RDPERR_BANK2</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:294</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_gac2bb0fa7590ba98dc0cd8c0d082ce8ab"><div class="ttname"><a href="#gac2bb0fa7590ba98dc0cd8c0d082ce8ab">FLASH_IT_STRBERR_BANK2</a></div><div class="ttdeci">#define FLASH_IT_STRBERR_BANK2</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:289</div></div>
<div class="ttc" id="agroup___f_l_a_s_h___interrupt__definition_html_gaee38b44a624d8b1f3b376a29add7eabb"><div class="ttname"><a href="#gaee38b44a624d8b1f3b376a29add7eabb">FLASH_IT_PGSERR_BANK2</a></div><div class="ttdeci">#define FLASH_IT_PGSERR_BANK2</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_flash.h:288</div></div>
</div><!-- fragment --><p>All Bank 2 Interrupt sources </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga196e6f4de2ebe393b60c266915a3bb7e">&#9670;&#160;</a></span>FLASH_IT_CRCEND_BANK1</h2>

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          <td class="memname">#define FLASH_IT_CRCEND_BANK1&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaa6202de9f4d37382c3a52afe3c2cd655">FLASH_CR_CRCENDIE</a></td>
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<p>CRC End on Bank 1 Interrupt source </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga0316e91aff7629580bed1a5cc9c11e75">&#9670;&#160;</a></span>FLASH_IT_CRCEND_BANK2</h2>

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          <td class="memname">#define FLASH_IT_CRCEND_BANK2&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gaa6202de9f4d37382c3a52afe3c2cd655">FLASH_CR_CRCENDIE</a>   | 0x80000000U)</td>
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<p>CRC End on Bank 2 Interrupt source </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga82dc3ee19141b5c071d2fa8db946ebe3">&#9670;&#160;</a></span>FLASH_IT_CRCRDERR_BANK1</h2>

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          <td class="memname">#define FLASH_IT_CRCRDERR_BANK1&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad8bf514ceab184ed0c0a1d661815ba5a">FLASH_CR_CRCRDERRIE</a></td>
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<p>CRC Read error on Bank 1 Interrupt source </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga81f4bdb6e41b6f99d9de03ca0b37b898">&#9670;&#160;</a></span>FLASH_IT_CRCRDERR_BANK2</h2>

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          <td class="memname">#define FLASH_IT_CRCRDERR_BANK2&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gad8bf514ceab184ed0c0a1d661815ba5a">FLASH_CR_CRCRDERRIE</a> | 0x80000000U)</td>
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<p>CRC Read Error on Bank 2 Interrupt source </p>

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<h2 class="memtitle"><span class="permalink"><a href="#gaabb332bc14eb56d71f8407f68f804510">&#9670;&#160;</a></span>FLASH_IT_DBECCERR_BANK1</h2>

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          <td class="memname">#define FLASH_IT_DBECCERR_BANK1&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaaeeb7a4dc65c20e72f61bcb221a78f42">FLASH_CR_DBECCERRIE</a></td>
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<p>Double Detection ECC Error on Bank 1 Interrupt source </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga8d4c4f393d3dcaf9e4bc547fe8163f8e">&#9670;&#160;</a></span>FLASH_IT_DBECCERR_BANK2</h2>

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          <td class="memname">#define FLASH_IT_DBECCERR_BANK2&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gaaeeb7a4dc65c20e72f61bcb221a78f42">FLASH_CR_DBECCERRIE</a> | 0x80000000U)</td>
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<p>Double Detection ECC Error on Bank 2 Interrupt source </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga1ec1ef5c1c76161b7dfe81e180e4b3bc">&#9670;&#160;</a></span>FLASH_IT_EOP_BANK1</h2>

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          <td class="memname">#define FLASH_IT_EOP_BANK1&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab9e69856f654ec430a42791a34799db0">FLASH_CR_EOPIE</a></td>
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<p>End of FLASH Bank 1 Operation Interrupt source </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga8345669c6dc0421104392dd926f1d47f">&#9670;&#160;</a></span>FLASH_IT_EOP_BANK2</h2>

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          <td class="memname">#define FLASH_IT_EOP_BANK2&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gab9e69856f654ec430a42791a34799db0">FLASH_CR_EOPIE</a>      | 0x80000000U)</td>
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<p>End of FLASH Bank 2 Operation Interrupt source </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga94ed32b4323dad1fbdabf08514da5473">&#9670;&#160;</a></span>FLASH_IT_INCERR_BANK1</h2>

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          <td class="memname">#define FLASH_IT_INCERR_BANK1&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae220b6ecd74fb7cbd19e072b3a00085e">FLASH_CR_INCERRIE</a></td>
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<p>Inconsistency Error on Bank 1 Interrupt source </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga5ffef1590d3e34618ead8ad0c73609ad">&#9670;&#160;</a></span>FLASH_IT_INCERR_BANK2</h2>

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          <td class="memname">#define FLASH_IT_INCERR_BANK2&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gae220b6ecd74fb7cbd19e072b3a00085e">FLASH_CR_INCERRIE</a>   | 0x80000000U)</td>
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<p>Inconsistency Error on Bank 2 Interrupt source </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga75f2443e9186b6010c22df22a7d0a795">&#9670;&#160;</a></span>FLASH_IT_PGSERR_BANK1</h2>

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          <td class="memname">#define FLASH_IT_PGSERR_BANK1&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae8deb645d3931dba28cf1ce31c25b3b2">FLASH_CR_PGSERRIE</a></td>
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<p>Program Sequence Error on Bank 1 Interrupt source </p>

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<h2 class="memtitle"><span class="permalink"><a href="#gaee38b44a624d8b1f3b376a29add7eabb">&#9670;&#160;</a></span>FLASH_IT_PGSERR_BANK2</h2>

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          <td class="memname">#define FLASH_IT_PGSERR_BANK2&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gae8deb645d3931dba28cf1ce31c25b3b2">FLASH_CR_PGSERRIE</a>   | 0x80000000U)</td>
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<p>Program Sequence Error on Bank 2 Interrupt source </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga63d27c2a86d8baeb592764e034214796">&#9670;&#160;</a></span>FLASH_IT_RDPERR_BANK1</h2>

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          <td class="memname">#define FLASH_IT_RDPERR_BANK1&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaac4593fa3b719667158986af4d44846b">FLASH_CR_RDPERRIE</a></td>
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<p>Read protection Error on Bank 1 Interrupt source </p>

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<a id="gaa9938793bc0431bdbba273f38123372e" name="gaa9938793bc0431bdbba273f38123372e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa9938793bc0431bdbba273f38123372e">&#9670;&#160;</a></span>FLASH_IT_RDPERR_BANK2</h2>

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          <td class="memname">#define FLASH_IT_RDPERR_BANK2&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gaac4593fa3b719667158986af4d44846b">FLASH_CR_RDPERRIE</a>   | 0x80000000U)</td>
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<p>Read protection Error on Bank 2 Interrupt source </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga13eaaa8999f0beeb6ba8bf85904b28fb">&#9670;&#160;</a></span>FLASH_IT_RDSERR_BANK1</h2>

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          <td class="memname">#define FLASH_IT_RDSERR_BANK1&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga9ee5c20523359c7a1cf348ba71867502">FLASH_CR_RDSERRIE</a></td>
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<p>Read Secured Error on Bank 1 Interrupt source </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga0613c2c2451c9b07a91b661ee2c03648">&#9670;&#160;</a></span>FLASH_IT_RDSERR_BANK2</h2>

<div class="memitem">
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          <td class="memname">#define FLASH_IT_RDSERR_BANK2&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga9ee5c20523359c7a1cf348ba71867502">FLASH_CR_RDSERRIE</a>   | 0x80000000U)</td>
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<p>Read Secured Error on Bank 2 Interrupt source </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga28519e989fe0b990de8ed886beac03d1">&#9670;&#160;</a></span>FLASH_IT_SNECCERR_BANK1</h2>

<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define FLASH_IT_SNECCERR_BANK1&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga3ded89effc76714dc0fecd93a8877dcb">FLASH_CR_SNECCERRIE</a></td>
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<p>Single ECC Error Correction on Bank 1 Interrupt source </p>

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<a id="ga41a3c918d208bbcdaae67abf0ebe9900" name="ga41a3c918d208bbcdaae67abf0ebe9900"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga41a3c918d208bbcdaae67abf0ebe9900">&#9670;&#160;</a></span>FLASH_IT_SNECCERR_BANK2</h2>

<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define FLASH_IT_SNECCERR_BANK2&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga3ded89effc76714dc0fecd93a8877dcb">FLASH_CR_SNECCERRIE</a> | 0x80000000U)</td>
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<p>Single ECC Error Correction on Bank 2 Interrupt source </p>

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<a id="ga24700978c9b5fcf608a28a55bb0bfb82" name="ga24700978c9b5fcf608a28a55bb0bfb82"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga24700978c9b5fcf608a28a55bb0bfb82">&#9670;&#160;</a></span>FLASH_IT_STRBERR_BANK1</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define FLASH_IT_STRBERR_BANK1&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga668cc207455dd7b5180de23c70876de2">FLASH_CR_STRBERRIE</a></td>
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<p>Strobe Error on Bank 1 Interrupt source </p>

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<a id="gac2bb0fa7590ba98dc0cd8c0d082ce8ab" name="gac2bb0fa7590ba98dc0cd8c0d082ce8ab"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac2bb0fa7590ba98dc0cd8c0d082ce8ab">&#9670;&#160;</a></span>FLASH_IT_STRBERR_BANK2</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define FLASH_IT_STRBERR_BANK2&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga668cc207455dd7b5180de23c70876de2">FLASH_CR_STRBERRIE</a>  | 0x80000000U)</td>
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</div><div class="memdoc">
<p>Strobe Error on Bank 2 Interrupt source </p>

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<a id="ga0982dd9273150c589c64384f98680f8c" name="ga0982dd9273150c589c64384f98680f8c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0982dd9273150c589c64384f98680f8c">&#9670;&#160;</a></span>FLASH_IT_WRPERR_BANK1</h2>

<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define FLASH_IT_WRPERR_BANK1&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga3fb16250168b407d58021199f2e55dd6">FLASH_CR_WRPERRIE</a></td>
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<p>Write Protection Error on Bank 1 Interrupt source </p>

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<a id="ga0e1cdf3a8de710205f1089662e8ec60e" name="ga0e1cdf3a8de710205f1089662e8ec60e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0e1cdf3a8de710205f1089662e8ec60e">&#9670;&#160;</a></span>FLASH_IT_WRPERR_BANK2</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define FLASH_IT_WRPERR_BANK2&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#ga3fb16250168b407d58021199f2e55dd6">FLASH_CR_WRPERRIE</a>   | 0x80000000U)</td>
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<p>Write Protection Error on Bank 2 Interrupt source </p>

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